Texas Instruments ADC12DJ4000RF Single/Dual-Channel ADC

Texas Instruments ADC12DJ4000RF Single/Dual-Channel Analog-to-Digital Converter (ADC) is an RF-sampling, giga-sample, ADC that can directly sample input frequencies from DC to above 10GHz. ADC12DJ4000RF can be configured as a dual-channel, 4GSPS ADC, or single-channel, 8GSPS ADC. Supports a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems.

The Texas Instruments ADC12DJ4000RF uses a high-speed JESD204C output interface with 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and the number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backward compatible with JESD204B receivers.

Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. Optional digital down converters (DDCs) are available to provide digital conversion to baseband and reduce the interface rate. A programmable FIR filter allows on-chip equalization.

Features

  • ADC core
    • 12-bit resolution
    • Up to 8GSPS in single-channel mode
    • Up to 4GSPS in dual-channel mode
  • Performance specifications
    • Noise floor (–20dBFS, VFS = 1VPP-DIFF)
      • Dual-channel mode (–152.3dBFS/Hz)
      • Single-channel mode (–155.0dBFS/Hz)
    • 8.8 Bits ENOB (dual-channel, FIN = 2.4GHz)
  • Buffered analog inputs with VCMI of 0V
    • 8GHz analog input bandwidth (–3dB) 
    • Usable input frequency range: > 10GHz
    • 0.8VPP full-scale input voltage (VFS, default) 
  • Noiseless aperture delay (tAD) adjustment
    • Precise sampling control (19fs step)
    • Simplifies synchronization and interleaving
    • Temperature and voltage invariant delays
  • Easy-to-use synchronization features
    • Automatic SYSREF timing calibration
    • Timestamp for sample marking
  • JESD204C serial data interface
    • 17.16Gbps maximum lane rate 
    • Support for 64b/66b and 8b/10b encoding
    • 8b/10b modes are JESD204B compatible
  • Optional digital down-converters (DDC)
    • 4x, 8x, 16x and 32x complex decimation
    • Four independent 32-Bit NCOs per DDC
  • Peak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)
  • Programmable FIR filter for equalization
  • 3.7W power consumption 
  • 1.1V, 1.9V power supplies 

Applications

  • Oscilloscopes and wideband digitizers
  • Communications testers (802.11ad, 5G)
  • Electronic warfare (SIGINT, ELINT)
  • Satellite communications (SATCOM)
  • RF-sampling software-defined radio (SDR)
  • Spectrometry

Functional Block Diagram

Block Diagram - Texas Instruments ADC12DJ4000RF Single/Dual-Channel ADC
Published: 2021-09-01 | Updated: 2023-12-20