Qorvo PAC5526 Power Applications Controller®

Qorvo PAC5526 Power Applications Controller® is an SoC (System-on-a-Chip) that is optimized for high-speed motor control and driving for battery-powered BLDC motors. The PAC5526 integrates a 150MHz Arm® Cortex®-M4F 32-Bit Microcontroller core with a highly configurable power manager, proprietary Configurable Analog Front-End™, and Application Specific Power Drivers™ in a single, compact package.

The PAC5526 features 128kB of embedded Flash, 32kB of SRAM memory, a 2.5MSPS Analog-to-Digital Converter (ADC) with programmable auto-sampling of up to 24 conversion sequences, 3.3V IO, flexible clock control system, PWM and general-purpose timers, and several serial communications interfaces.

The integrated Power Manager provides a charge pump, buck-boost converter, and four linear regulated voltage supplies. The Application Specific Power Drivers (ASPD) are power drivers designed for half-bridge, H-bridge, 3-phase, and general-purpose driving. The Configurable Analog Front End (CAFE) comprises differential programmable gain amplifiers, single-ended programmable gain amplifiers, comparators, digital-to-analog converters, and I/Os for programmable and inter-connectible signal sampling, feedback amplification, and sensor monitoring of multiple analog input signals.

The Qorvo PAC5526 is available in a 6mm x 6mm Thin Quad Flat No-Lead (TQFN) package with an exposed pad for thermal management.

Features

Power Manager

Charge pump DC-DC for high-side gate drive supply
6V to 48V input voltage
Buck-Boost regulator for low-side gate drive supply
Configurable 10V or 12V
4x linear regulators with power and hibernate management
Power and temperature monitor, warning, fault detection

Proprietary Configurable Analog Front-End

6 analog front-end I/O pins
Differential programmable gain amplifier
5 single-ended programmable gain amplifiers
Programmable over-current protection and current limit
2x 10-bit DACs

Proprietary Application Specific Power Drivers

3x high-side gate drivers with a programmable gate driving up to 1A
100% duty cycle
Cycle-by-cycle current limit
Configurable fault protection

3.3V I/Os

150MHz Arm Cortex-M4F 32-bit MCU core
Single-cycle 32-bit x 32-bit hardware multiplier
32-bit hardware divider
DSP instructions and saturation arithmetic support
Integrated sleep and deep sleep modes
Single-precision Floating Point Unit (FPU)
8-region Memory Protection Unit (MPU)
Nested Vectored Interrupt Controller (NVIC) with 32 interrupts with 8 levels of priority
24-bit SysTick timer
Wake-up Interrupt Controller (WIC) allowing power-saving sleep modes
Clock-gating allowing low-power operation
Embedded Trace Macrocell (ETM) for in-system debugging at real-time without breakpoints

Memory

128kB Flash
32kB SRAM with ECC
2x 1kB INFO FLASH area for manufacturing information
1x 1kB INFO FLASH area for user parameter storage and application configuration or code
4-Level Code Protection
Analog to Digital Converter (ADC)
12-bit, 2.5MSPS SAR ADC
Programmable Dynamic Triggering and Sampling Engine (DTSE)

20x general-purpose I/Os with tri-state, pull-up, pull-down, and dedicated I/O supply
10x I/Os can be configured as ADC input or digital I/O
Configurable weak pull-up and pull-down
Configurable drive strength (6mA to 25mA minimum)
Dedicated integrated IO power supply (3.3V)
Flexible peripheral MUX allowing each IO pin to be configured with one of up to 8 peripheral functions
Flexible Interrupt Controller

Flexible Clock Control System (CCS)

300MHz PLL from internal 25% oscillator
20MHz ring oscillator
20MHz external clock input

Timing Generators

Four 16-bit timers with up to 32 PWM/CC blocks
16x programmable hardware dead-time generators
Up to 300MHz input clock for high-resolution PWM
16-bit Windowed Watchdog Timer (WWDT)
24-bit Real-Time Clock (RTC) with calendar and alarm functions
24-bit SysTick Timer
2x 24-bit General-purpose count-down timers with interrupt
Wake-up timer for sleep modes from 0.125s to 8s

Communication Peripherals

3x USART
SPI or UART modes
SPI Master/Slave, up to 25MHz
UART up to 1Mbps
I²C Master/Slave
CAN 0B Controller
Single Wire Debugger (SWD), JTAG
Embedded Trace Macrocell (ETM)

Security

4-Level User-Configurable Code Protection
96-bit Unique ID

CRC Engine

Offloads software for communications and safety protocol through hardware acceleration
Configurable Polynomial (CRC-16 or CRC-8)
Configurable input data width, input, and output reflection
Programmable seed value