MT46V32M16P-5B:J

Images are for reference only
See Product Specifications

Mouser No:

340-122552-TRAY

Mfr. No:

MT46V32M16P-5B:J

Mfr.:

Micron

Description:

DRAM DDR 512Mbit 16 66/66TSOP 1 CT

Lifecycle:

Obsolete

Datasheet:

MT46V32M16P-5B:J Datasheet (PDF)

ECAD Model:

Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.

More Information

Learn more about Micron MT46V32M16P-5B:J

Delivery Restriction:

Mouser does not presently sell this product in your region.

.hidden-for-nojs { display: none; } .pull-right-nojs { justify-content: flex-end; }

Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Micron Technology
Product Category:	DRAM
Delivery Restriction:	Mouser does not presently sell this product in your region.
RoHS:
Type:	SDRAM - DDR
Memory Size:	512 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	200 MHz
Package/Case:	TSOP-66
Organisation:	32 M x 16
Access Time:	700 ps
Supply Voltage - Min:	2.5 V
Supply Voltage - Max:	2.7 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 70 C
Series:	MT46V
Packaging:	Tray
Brand:	Micron
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	1080
Subcategory:	Memory & Data Storage
Supply Current - Max:	85 mA
Unit Weight:	551 mg

Products found:

To show similar products, select at least one checkbox

Select at least one checkbox above to show similar products in this category.

Attributes selected: 0

Filter Document:

Datasheet

MT46V32M16P-5B:J Datasheet (PDF)

This functionality requires JavaScript to be enabled.

Compliance Codes

CNHTS:: 8542329010
CAHTS:: 8542320020
USHTS:: 8542320028
MXHTS:: 8542320299
ECCN:: EAR99

Origin Classifications

Country of Origin:: Taiwan
Assembly Country of Origin:: Taiwan
Country of Diffusion:: United States

The country is subject to change at the time of shipment.

DDR SDRAM

Micron DDR SDRAM is revolutionary and pioneering technology that allows applications to transfer data on the rising and falling edges of a clock signal. This doubles bandwidth and improves performance over SDR SDRAM. To achieve this functionality, Micron uses a 2n-prefetch architecture where the internal data bus is double the size of the external data bus, so data capture can happen two times each clock cycle.