SN74HCT240N

Texas Instruments
595-SN74HCT240N
SN74HCT240N

Mfr.:

Description:
Buffers & Line Drivers Tri-State Octal

ECAD Model:
Download the free Library Loader to convert this file for your ECAD Tool. Learn more about the ECAD Model.

In Stock: 1.165

Stock:
1.165 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:

Pricing (EUR)

Qty. Unit Price
Ext. Price
0,757 € 0,76 €
0,543 € 5,43 €
0,488 € 9,76 €
0,429 € 42,90 €
0,401 € 104,26 €
0,384 € 192,00 €
0,37 € 370,00 €
0,355 € 1.420,00 €
0,337 € 2.696,00 €

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Buffers & Line Drivers
RoHS:  
HCT
8 Input
8 Output
Inverting
PDIP-20
- 6 mA
6 mA
8 uA
4.5 V
5.5 V
80 uA
- 40 C
+ 85 C
Through Hole
Tube
Brand: Texas Instruments
Country of Assembly: MY
Country of Diffusion: US
Country of Origin: MY
Logic Type: CMOS
Number of Channels: 8 Channel
Output Type: 3-State
Product Type: Buffers & Line Drivers
Propagation Delay Time: 42 ns at 4.5 V, 38 ns at 5.5 V
Series: SN74HCT240
Factory Pack Quantity: 20
Subcategory: Logic ICs
Unit Weight: 1,199 g
Products found:
To show similar products, select at least one checkbox
Select at least one checkbox above to show similar products in this category.
Attributes selected: 0

This functionality requires JavaScript to be enabled.

TARIC:
8542319000
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
MXHTS:
8542399999
ECCN:
EAR99

SN74HCT240 Octal Buffers/Line Drivers

Texas Instruments SN74HCT240 Octal Buffers/Line Drivers are explicitly designed to improve the performance and density of clock drivers, 3-state memory address drivers, and bus-oriented receivers and transmitters. The Texas Instruments SN74HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is high, the outputs are in the high-impedance state. When OE is low, the device passes inverted data from the A inputs to the Y outputs.