SN74HC240DBR

Texas Instruments
595-SN74HC240DBR
SN74HC240DBR

Mfr.:

Description:
Buffers & Line Drivers Octal Buffers and Li ne Drivers

ECAD Model:
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In Stock: 2.836

Stock:
2.836 Can Dispatch Immediately
Factory Lead Time:
6 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 2000)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
1,01 € 1,01 €
0,621 € 6,21 €
0,522 € 13,05 €
0,396 € 39,60 €
0,342 € 85,50 €
0,30 € 150,00 €
0,27 € 270,00 €
Full Reel (Order in multiples of 2000)
0,27 € 540,00 €
0,231 € 924,00 €
0,203 € 1.624,00 €
† A MouseReel™ fee of 5,00 € will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Buffers & Line Drivers
RoHS:  
HC
8 Input
8 Output
Inverting
SSOP-20
- 7.8 mA
7.8 mA
8 uA
2 V
6 V
80 uA
- 40 C
+ 85 C
SMD/SMT
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Country of Assembly: MY
Country of Diffusion: US
Country of Origin: MY
Logic Type: CMOS
Number of Channels: 8 Channel
Output Type: 3-State
Product Type: Buffers & Line Drivers
Propagation Delay Time: 150 ns at 2 V, 30 ns at 4.5 V, 26 ns at 6 V
Series: SN74HC240
Factory Pack Quantity: 2000
Subcategory: Logic ICs
Unit Weight: 156,700 mg
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Attributes selected: 0

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TARIC:
8542319000
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
MXHTS:
8542310399
ECCN:
EAR99

SN74HC240 Octal Buffers/Line Drivers

Texas Instruments SN74HC240 Octal Buffers/Line Drivers are explicitly designed to improve the performance and density of clock drivers, 3-state memory address drivers, and bus-oriented receivers and transmitters. The Texas Instruments SN74HC240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is high, the outputs are in the high-impedance state. When OE is low, the device passes inverted data from the A inputs to the Y outputs.