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SN74AHCT74NSR

Name: Texas Instruments SN74AHCT74NSR
Brand: Texas Instruments
SKU: 595-SN74AHCT74NSR
Price: 0.38 EUR
Availability: OutOfStock

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Mouser No:

595-SN74AHCT74NSR

Mfr. No:

SN74AHCT74NSR

Mfr.:

Texas Instruments

Description:

Flip-Flops Dual Pos-Edge-Trig D -Type Flip-Flop

Datasheet:

SN74AHCT74NSR Datasheet

ECAD Model:

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More Information

Learn more about Texas Instruments SN74AHCT74NSR

Availability

Stock:: Non-Stocked

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Factory Lead Time:: 6 Weeks Estimated factory production time.

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Minimum: 2000 Multiples: 2000

Unit Price:

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Ext. Price:

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Est. Tariff:

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Pricing (EUR)

Qty.	Unit Price	Ext. Price
Full Reel (Order in multiples of 2000)
	0,384 €	768,00 €
	0,369 €	1.476,00 €
	0,361 €	2.888,00 €

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Texas Instruments
Product Category:	Flip-Flops
RoHS:
Logic Type:	D-Type Flip-Flop
Logic Family:	AHCT
Number of Circuits:	2 Circuit
Output Type:	CMOS
Package/Case:	SOIC-14
Input Type:	TTL
Polarity:	Inverting/Non-Inverting
Propagation Delay Time:	8.8 ns
High Level Output Current:	- 8 mA
Low Level Output Current:	8 mA
Supply Voltage - Min:	4.5 V
Supply Voltage - Max:	5.5 V
Mounting Style:	SMD/SMT
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 125 C
Packaging:	Reel
Brand:	Texas Instruments
Number of Input Lines:	4
Number of Output Lines:	2 Line
Product Type:	Flip Flops
Series:	SN74AHCT74
Factory Pack Quantity:	2000
Subcategory:	Logic ICs
Unit Weight:	208,300 mg

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Datasheet

SN74AHCT74NSR Datasheet

Images

Mechanical Outline Drawing

PCN

Product Catalogs

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TARIC:: 8542399000
CNHTS:: 8542319090
CAHTS:: 8542390000
USHTS:: 8542390090
JPHTS:: 8542390990
MXHTS:: 85423999
ECCN:: EAR99

SN74AHCT74/SN74AHCT74-Q1 Dual D-Type Flip-Flops

Texas Instruments SN74AHCT74/SN74AHCT74-Q1 Dual D-Type Flip-Flops are dual positive-edge-triggered devices with clear and preset. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When the Texas Instruments SN74AHCT74/SN74AHCT74-Q1 PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. The SN74AHCT74-Q1 devices are AEC-Q100 qualified for automotive applications.