SN74AHCT139PW

595-SN74AHCT139PW
SN74AHCT139PW

Mfr.:

Description:
Encoders, Decoders, Multiplexers & Demultiplexers Dual 2 to 4-Line Decdr/Demltplxer

Lifecycle:
End of Life:
Scheduled for obsolescence and will be discontinued by the manufacturer.
ECAD Model:
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In Stock: 187

Stock:
187 Can Dispatch Immediately
Quantities greater than 187 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:

Pricing (EUR)

Qty. Unit Price
Ext. Price
1,04 € 1,04 €
0,753 € 7,53 €
0,673 € 16,83 €
0,576 € 51,84 €
0,562 € 151,74 €
0,561 € 605,88 €
0,55 € 2.227,50 €
0,536 € 4.293,36 €

Alternative Packaging

Mfr. Part No.:
Packaging:
Reel, Cut Tape, MouseReel
Availability:
In Stock
Price:
0,30 €
Min:
1

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Encoders, Decoders, Multiplexers & Demultiplexers
RoHS:  
Decoders / Demultiplexers
AHCT
2 Input
4 Output
TSSOP-16
8.5 ns
4.5 V
5.5 V
SMD/SMT
- 40 C
+ 85 C
Tube
Brand: Texas Instruments
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: MY
Logic Type: Decoders/Demultiplexers
Number of Circuits: 2 Circuit
Product Type: Encoders, Decoders, Multiplexers & Demultiplexers
Series: SN74AHCT139
Factory Pack Quantity: 90
Subcategory: Logic ICs
Unit Weight: 62 mg
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TARIC:
8542399000
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
8542390990
MXHTS:
85423999
ECCN:
EAR99

SN74AHCT139/SN74AHCT139-Q1 Decoders/Demultiplexers

Texas Instruments SN74AHCT139/SN74AHCT139-Q1 2-to-4-Line Decoders/Demultiplexers are designed for 4.5V to 5.5V VCC operation. These devices are intended for high-performance data routing or memory decoding applications requiring very short propagation delay times. These decoders can be used to minimize the effects of system decoding in high-performance memory systems. When used with high-speed memories utilizing a fast enable circuit, the enable time of the memory and the delay times of these decoders are usually less than the typical access time. This reduction means that the effective system delay introduced by the decoders is negligible.