LMK1D2106RHAR

LMK1D2106/LMK1D2108 LVDS Clock Buffer

Texas Instruments LMK1D2106/LMK1D2108 LVDS Clock Buffer is specifically designed for driving 50Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin. The LMK1D2106 distributes with minimum skew one of two selectable clock inputs (IN0 and IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D2108 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). Each buffer block consists of one input and a maximum of 6 (LMK1D2106) or 8 (LMK1D2108) LVDS outputs. The inputs can be LVDS, LVPECL, HCSL, CML, or LVCMOS.