LMK1D2106LRHAT

Texas Instruments
595-LMK1D2106LRHAT
LMK1D2106LRHAT

Mfr.:

Description:
Clock Buffer Dual bank 2-channel output LVDS 1.8V 2.

Lifecycle:
New Product:
New from this manufacturer.
Datasheet:
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Learn more about Texas Instruments LMK1D2106LRHAT
This product may require additional documentation to export from the United States.

Availability

Stock:
0

You can still purchase this product for backorder.

On Order:
250
Expected 4/20/2026
Factory Lead Time:
12
Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:

Pricing (EUR)

Qty. Unit Price
Ext. Price
16,03 € 16,03 €
12,77 € 127,70 €
11,95 € 298,75 €
11,06 € 1.106,00 €
Full Reel (Order in multiples of 250)
10,62 € 2.655,00 €
10,23 € 5.115,00 €
10,22 € 10.220,00 €
5.000 Quote

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Clock Buffer
Delivery Restrictions:
 This product may require additional documentation to export from the United States.
RoHS:  
12 Output
575 ps
LVDS
VQFN-40
2 GHz
1.71 V
3.465 V
LMK1D2106L
- 40 C
+ 105 C
Brand: Texas Instruments
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: Not Available
Development Kit: LMK1D1212EVM
Duty Cycle - Max: 50 %
Mounting Style: SMD/SMT
Operating Supply Current: 140 mA
Packaging: Reel
Packaging: Cut Tape
Product: Clock Buffers
Product Type: Clock Buffers
Factory Pack Quantity: 250
Subcategory: Clock & Timer ICs
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Attributes selected: 0

Datasheet

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USHTS:
8542390090
MXHTS:
8542399999
ECCN:
3A001.A.2.A

LMK1D210xL Low Additive LVDS Buffers

Texas Instruments LMK1D210xL Low-Additive LVDS Buffers are low noise dual clock buffers that distribute one input to a maximum of two (LMK1D2102L), four (LMK1D2104L), six (LMK1D2106L) or eight (LMK1D2108L) LVDS outputs. The inputs can be LVDS, LVPECL, HCSL, CML, or LVCMOS. The LMK1D210xL is designed explicitly for driving 50Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin.

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