LMK04208NKDT

Texas Instruments
595-LMK04208NKDT
LMK04208NKDT

Mfr.:

Description:
Clock Synthesizer/Jitter Cleaner Ultra low-noise cloc k jitter cleaner wi A 595-LMK04208NKDR

ECAD Model:
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In Stock: 365

Stock:
365 Can Dispatch Immediately
Factory Lead Time:
18 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 250)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
14,59 € 14,59 €
11,58 € 115,80 €
10,84 € 271,00 €
Full Reel (Order in multiples of 250)
9,87 € 2.467,50 €
9,25 € 4.625,00 €
9,02 € 9.020,00 €
2.500 Quote
† A MouseReel™ fee of 5,00 € will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Clock Synthesizer/Jitter Cleaner
RoHS:  
7 Output
3.072 GHz
LVCMOS, LVDS, LVPECL
LVCMOS, LVDS, LVPECL
WQFN-64
3.1 GHz
3.15 V
3.45 V
- 40 C
+ 85 C
LMK04208
SMD/SMT
Reel
Cut Tape
MouseReel
Brand: Texas Instruments
Country of Assembly: MY
Country of Diffusion: US
Country of Origin: MY
Moisture Sensitive: Yes
Operating Supply Current: 445 mA
Product: Clock Jitter Cleaners
Product Type: Clock Synthesizers / Jitter Cleaners
Factory Pack Quantity: 250
Subcategory: Clock & Timer ICs
Type: Dual Loop PLLs
Unit Weight: 40 mg
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TARIC:
8542399000
CNHTS:
8542399000
CAHTS:
8542390000
USHTS:
8542390090
JPHTS:
854239099
MXHTS:
8542399901
ECCN:
EAR99

LMK04208 Ultra Low Noise Clock Jitter Cleaner

Texas Instruments LMK04208 Ultra Low Noise Clock Jitter Cleaner is a high-performance clock conditioner with superior clock jitter cleaning, generation, and distribution. This device includes advanced features to meet next generation system requirements. The dual loop PLLatinum™ architecture is capable of 111fs, RMS jitter (12kHz to 20MHz) using a low-noise VCXO module or sub-200fs rms jitter (12kHz to 20MHz) using a low cost external crystal and varactor diode. The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides low-noise jitter cleaner functionality while the second PLL (PLL2) performs the clock generation.
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