DAC38RF84IAAVR

Texas Instruments
595-DAC38RF84IAAVR
DAC38RF84IAAVR

Mfr.:

Description:
Digital to Analog Converters - DAC 14-Bit 9-GSPS 6x-2 4 x Interpolating 6 A A 595-DAC38RF84IAAV

ECAD Model:
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Availability

Stock:
Non-Stocked
Factory Lead Time:
18 Weeks Estimated factory production time.
Minimum: 1000   Multiples: 1000
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
This Product Ships FREE

Pricing (EUR)

Qty. Unit Price
Ext. Price
Full Reel (Order in multiples of 1000)
100,96 € 100.960,00 €

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Digital to Analog Converters - DAC
RoHS:  
DAC38RF84
14 bit
9 GS/s
1 Channel
1 ns
Voltage
JESD204B
- 40 C
+ 85 C
SMD/SMT
FCBGA-144
Reel
Architecture: Current Source
Brand: Texas Instruments
Features: Ultra High Speed
Moisture Sensitive: Yes
Number of Converters: 1 Converter
Pd - Power Dissipation: 3.779 W
Power Consumption: 2.195 W
Product Type: DACs - Digital to Analog Converters
Reference Type: External, Internal
Reference Voltage: 900 mV
SFDR - Spurious Free Dynamic Range: 72 dB
Shutdown: No Shutdown
Factory Pack Quantity: 1000
Subcategory: Data Converter ICs
Supply Voltage - Max: 1.89 V
Supply Voltage - Min: - 1.89 V
Type: RF DAC
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CNHTS:
8542390000
CAHTS:
8542390000
USHTS:
8542390040
JPHTS:
854239099
MXHTS:
8542399901
ECCN:
EAR99

DAC38RFxx 14-bit 9GSPS DACs

Texas Instruments DAC38RFxx 14-bit 9GSPS Digital-to-Analog Converters (DACs) can synthesize wideband signals from 0 to 4.5GHz. A high dynamic range allows the DAC38RFxx to generate signals for many applications, including 3G/4G signals for wireless base stations. These devices feature a low-power JESD204B Interface with up to 8 lanes. The devices also provide a maximum bit rate and input data rate of 12.5Gbps and 1.25GSPS complex per channel. The Texas Instruments DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs is available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing the use of a lower frequency reference clock.