ADC12J1600NKE

Texas Instruments
595-ADC12J1600NKE
ADC12J1600NKE

Mfr.:

Description:
Analog to Digital Converters - ADC 12-Bit 1.6 GSPS RF s amplin ADCJESD204B A 595-ADC12J1600NKER

ECAD Model:
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This product may require additional documentation to export from the United States.

Availability

Stock:
Non-Stocked
Factory Lead Time:
18 Weeks Estimated factory production time.
Minimum: 168   Multiples: 168
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
This Product Ships FREE

Pricing (EUR)

Qty. Unit Price
Ext. Price
1.069,78 € 179.723,04 €

Product Attribute Attribute Value Select Attribute
Texas Instruments
Product Category: Analog to Digital Converters - ADC
Delivery Restrictions:
 This product may require additional documentation to export from the United States.
RoHS:  
ADC12J1600
VQFN-68
12 bit
JESD204B
1.6 GS/s
Folding Interpolating
1.2 V, 1.9 V
1.2 V, 1.9 V
- 40 C
+ 85 C
Tray
Brand: Texas Instruments
Country of Assembly: Not Available
Country of Diffusion: Not Available
Country of Origin: PH
DNL - Differential Nonlinearity: +/- 0.25 LSB
ENOB - Effective Number of Bits: 8.8 Bit
Features: Ultra High Speed
Moisture Sensitive: Yes
Power Consumption: 1.6 W
Product Type: ADCs - Analog to Digital Converters
SFDR - Spurious Free Dynamic Range: 70 dB
SINAD - Signal to Noise and Distortion Ratio: 54.8 dB
Factory Pack Quantity: 168
Subcategory: Data Converter ICs
Unit Weight: 314,400 mg
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TARIC:
8542399000
CNHTS:
8542319000
CAHTS:
8542390000
USHTS:
8542390030
JPHTS:
854239099
MXHTS:
8542399999
ECCN:
3A001.a.5.a.3

ADC12Jxx00 12-Bit RF-Sampling ADCs

Texas Instruments ADC12Jxx00 12-Bit RF-Sampling ADCs are wideband sampling and digital tuning devices. This giga-sample analog-to-digital converter (ADC) technology enables a large block of the frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.