AS4C4M16SA-6TCNTR

Alliance Memory
913-4C4M16SA-6TCNTR
AS4C4M16SA-6TCNTR

Mfr.:

Description:
DRAM SDR, 64Mb, 4M x 16, 3.3V, 54pin TSOP II, 166 MHz, Commercial Temp, tape and reel, A Die

ECAD Model:
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In Stock: 980

Stock:
980 Can Dispatch Immediately
Factory Lead Time:
8 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
-,-- €
Ext. Price:
-,-- €
Est. Tariff:
Packaging:
Full Reel (Order in multiples of 1000)

Pricing (EUR)

Qty. Unit Price
Ext. Price
Cut Tape / MouseReel™
2,80 € 2,80 €
2,61 € 26,10 €
2,54 € 63,50 €
2,48 € 124,00 €
2,42 € 242,00 €
2,34 € 585,00 €
2,30 € 1.150,00 €
Full Reel (Order in multiples of 1000)
2,19 € 2.190,00 €
2,15 € 4.300,00 €
† A MouseReel™ fee of 5,00 € will be added and calculated in your basket. All MouseReel™ orders are non-cancellable and non-returnable.

Alternative Packaging

Mfr. Part No.:
Packaging:
Tray
Availability:
In Stock
Price:
3,47 €
Min:
1

Product Attribute Attribute Value Select Attribute
Alliance Memory
Product Category: DRAM
RoHS:  
SDRAM
64 Mbit
16 bit
166 MHz
TSOP-II-54
4 M x 16
5.4 ns
3 V
3.6 V
0 C
+ 70 C
AS4C4M16SA
Reel
Cut Tape
MouseReel
Brand: Alliance Memory
Country of Assembly: TW
Country of Diffusion: Not Available
Country of Origin: TW
Moisture Sensitive: Yes
Mounting Style: SMD/SMT
Product Type: DRAM
Factory Pack Quantity: 1000
Subcategory: Memory & Data Storage
Supply Current - Max: 50 mA
Unit Weight: 1,182 g
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Attributes selected: 0

USHTS:
8542320002
JPHTS:
854232021
MXHTS:
8542320201
ECCN:
EAR99

AS4C SDRAM

Alliance Memory AS4C SDRAM is high-speed CMOS synchronous DRAM containing 64Mbits, 128Mbits, or 256Mbits. They are internally configured as 4 banks of 1M, 2M, or 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented, accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by a Read or Write command.